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Research paper 'Modular Test System Architecture for Device, Circuit and System Level Reliability Testing' presented at the APEC 2016 in Long Beach, California, March 20-24, 2016.

The proposed architecture is suitable for a broad range of power devices and can easily be adapted to future test requirements. The test circuit is clearly separated from the control and data acquisition part, vital parameters of the DUTs are continuously collected for subsequent statistical lifetime analysis.